The present invention relates to an electronic device packaging structure for packaging electronic circuit packages in a data processor or electronic computer, for instance.
With a conventional electronic device packaging structure, one logical function block is constructed using two back panels as shown in FIGS. 1 and 2. Two back panels lla and 11b, each carrying a plurality of electronic circuit packages 12 on the outside thereof, are disposed opposite with a frame 13 interposed therebetween. The back panels lla and 11b are interconnected by cables 14 via connectors 15 provided on the back panels at the peripheral portions thereof.
According to this conventional electronic device packaging structure, the length of package wiring, l, for signal connection between a point Q on the back panel lla and a point R on the back panel llb is the sum of wiring pattern lengths l.sub.1 and l.sub.2 from the points Q and R to the connectors 15 on the marginal portions of the back panels 11a and llb and the length l.sub.3 of the cable 14 interconnecting the connectors 15, that is, l=l.sub.l +l.sub.2 +l.sub.3. Thus the prior art package structure has the defect that the package wiring length l is long. The wiring patterns are not straight in practice and their lengths l.sub.1 and l.sub.2 are usually appreciably greater than in the case where they are straight. This constitutes an obstacle to the implementation of high-speed electronic devices.